www.radisys.comPROMENTUM®COMPUTE PROCESSING MODULEREFERENCEATCA-4500ATCA-4550ATCA-4555007-03292-0005 • June 2011
TitlePreface10Standards informationForinformationaboutthePCIIndustrialComputerManufacturersGroup(PICMG)andtheAdvancedTCAstandard,consult
BIPMI Commands and Managed Sensors100OEM command descriptionsSpecial commands are available to facilitate CPM-specific functionality. Descriptions of
BOEM command descriptions101Set Control State (for debug only)Overrides the current firmware setting of the control pin. Use only for debug situations
BIPMI Commands and Managed Sensors102RTM Reset ButtonInstructs the H8 IPMI firmware to perform a cold reset.Set Payload StatusInforms the H8 IPMI firm
BOEM command descriptions103Get Payload Status (debug only)Returns the H8 IPMI firmware acknowledgement of the payload processor status. The BIOS/OS u
BIPMI Commands and Managed Sensors104Managed sensorsOn the CPM, the IPMC sensors monitor voltages, temperatures, control signals, and status events. F
105BList of sensorsList of sensorsTable 35 provides details about the sensors managed by the IPMC. All sensors generate events unless noted otherwise
106BIPMI Commands and Managed SensorsRTM FRU Hotswap 02hPICMG Hot swap event F0hSensor-specific 6Fh00h-07h00hPer PICMG3.0 specPer PICMG3.0 specM0 – FR
107BList of sensorsRTM Present05hSlot orconnector 21hDigital discrete 03h0 or 1 - - - - Yes A X 0.2 01h0 1RTM is not presentRTM is presentAsserted at
108BIPMI Commands and Managed SensorsSPD DIMM B0 Temp 0Ah Temp 01hThreshold 01h 25 R, T - - [u,l][nr,c,nc]As & De Analog A - 0.2 01hThis sensor me
109BList of sensorsSPD DIMM C1 Temp 0Eh Temp 01hThreshold 01h 25 R, T - - [u,l][nr,c,nc]As & De Analog A - 0.2 01hThis sensor measures temperature
TitleRelated Documents11PICMG3.1R1.0Ethernet/FibreChanneloverPICMG3.0,PICMG.PICMGHPM.1R1.0HardwarePlatformManagementIPMControllerFirmw
110BIPMI Commands and Managed SensorsCPU ProcHot213h Temp 01hThreshold 01h 0 R, T - - [u,l][nr,c,nc]As & De Analog A - 0.2 01hThis sensor measures
111BList of sensors+12V 19h Voltage 02hThreshold 01h 12.00 R, T - - [u,l][nr,c,nc]As & De Analog A - 0.2 01hThis sensor measures voltage in volts.
112BIPMI Commands and Managed Sensors+1.8V CPU 1Fh Voltage 02hThreshold 01h 1.80 R, T - - [u,l][nr,c,nc]As & De Analog A - 0.2 01hThis sensor meas
113BList of sensors+1.1V VTT 26h Voltage 02hThreshold 01hVID=1.025~1.22R, T - - [u,l][nr,c,nc]As & DeAnalog A - 0.2 01hThis sensor measures voltag
114BIPMI Commands and Managed SensorsOEM ActiveBoot Flash 2Bh OEM EEhSensor-specific 6Fh 0 or 100h00hThe cause of reset: [7:0] -00h = CFD Timer was i
115BList of sensorsIPMC Watchdog 2Dh OEM EDhDigital discrete 03h N/A 01h - -State AssertedAs Yes A X 0.2 01hSensor SDR states that this sensor does no
116BIPMI Commands and Managed Sensors+3.3V AMCFail734hPower Supply08hDigitalDiscrete03h0 or 1 01h _ _State AssertedAs & DeYes A _ 0.2 01h1 0Deasse
117BList of sensorsENET Link 0 (Ethernet linkfor FRONT/REAR port) 3Dhslot or connector21hDigitalDiscrete03h 0 or 1 01h _ _State AssertedAs & De Ye
118BIPMI Commands and Managed SensorsEventLogDisabled44hEvent Logging Disabled 10hSensor Specific 6FhN/A02hFFh-Log Area Reset ClearedAs Yes A X 0.2 01
119BList of sensorsN/A00h -Event Data 3 (for both event offsets 0h, 1h):[7:6] – Rsvd.[5:4] – Ch #[3:0] – DIMM numberCorrectable ECC/ other correctable
TitlePreface12
120BIPMI Commands and Managed SensorsSys FWProgress847hSystem Firmware progress 0FhSensor Specific 6Fh N/A00hSee System Firmware Progress sensor in Ta
121BList of sensorsOEM HPMEvent 4Bh OEM EFhSensor Specific 6Fh N/A00h 00h 00hBoot Record CorruptionAs - --N/A03hAfter the application code starts, the
122BIPMI Commands and Managed SensorsOEM CFD Watchdog4ChWatchdog 2 23hSensor Specific 6FhN/A 03h - -Power CycleAs - - - N/A 03hOEM Shmc_HA_State 4Dh O
BOEM sensor details123OEM sensor detailsThis section provides details about the OEM managed sensors listed in Table 35 on page 105.OEM Payload Reset s
BIPMI Commands and Managed Sensors124Temperature sensor detailsThis section describes temperature sensors which require initial configuration support
BSensor alarm troubleshooting125IOH Die temperature sensor (10h)The Intel 5520 IOH provides an on-die temperature measurement which can be accessed vi
BIPMI Commands and Managed Sensors12607h SPD DIMM A0 TempMinor temperature highTemperature over 72°C threshold.Monitor to see if the alarm worsens.Maj
BSensor alarm troubleshooting12709h SPD DIMM A2 TempMinor temperature highTemperature over 72°C threshold.Monitor to see if the alarm worsens.Major te
BIPMI Commands and Managed Sensors1280Bh SPD DIMM B1 TempMinor temperature highTemperature over 72°C threshold.Monitor to see if the alarm worsens.Maj
BSensor alarm troubleshooting1290Dh SPD DIMM C0 TempMinor temperature highTemperature over 72°C threshold.Monitor to see if the alarm worsens.Major te
131PRODUCT OVERVIEWThePromentumATCA‐4500,ATCA‐4550,andATCA‐4555ComputeProcessingModules(CPMs)arehigh‐performancegeneral‐purposecomputing
BIPMI Commands and Managed Sensors13010h IOH Die Temp Minor temperature highTemperature over -20 threshold. Monitor to see if the alarm worsens.Major
BSensor alarm troubleshooting13113h CPU ProcHot Minor temperature highTemperature over 65°C threshold.Monitor to see if the alarm worsens.Major temper
BIPMI Commands and Managed Sensors13219h +12V Minor voltage high Voltage over 12.6V threshold; CPM will not go into M4 state.1Monitor to see if the al
BSensor alarm troubleshooting1331Ch +3.3V IPMI Minor voltage high Voltage over 3.47V threshold; CPM will not go into M4 state.1Monitor to see if the a
BIPMI Commands and Managed Sensors1341Fh +1.8V_CPU Minor voltage high Voltage over 1.89V threshold; CPM will not go into M4 state.1Monitor to see if t
BSensor alarm troubleshooting13522h +1.5V Minor voltage high Voltage over 1.58V threshold; CPM will not go into M4 state.1Monitor to see if the alarm
BIPMI Commands and Managed Sensors13625h +1.1V Minor voltage high Voltage over 1.17V threshold; CPM will not go into M4 state.1Monitor to see if the a
BSensor alarm troubleshooting13728h +1.0V_FRONT Minor voltage high Voltage over 1.05V threshold; CPM will not go into M4 state.1Monitor to see if the
BIPMI Commands and Managed Sensors13831h +12V RTM PwrFailN/A Power problem Monitor to see if the alarm worsens or is persistent for more than 1 day. I
BTemperature sensor locations139Temperature sensor locationsAs shown in Figure 18, the CPM uses I2C busses 2 and 3 to access internal temperature info
1Product Overview14Block diagramFigure 1illustratestheCPM’smajorfunctionalblocks.Chapter4,ComponentsandSubsystems,onpage 31containsdeta
BIPMI Commands and Managed Sensors140
141CCONNECTOR PINOUTS AND JUMPER SETTINGSFront panel interfacesThefrontUSBandEthernetinterfacesarestandardandnotdetailedhere.Theconsoles
CConnector Pinouts and Jumper Settings142Backplane interfacesBackplane connectivity summaryThissectiondescribesthebackplaneinterfaceconnectivity
CZone 1 P10 connector pinout143Zone 1 P10 connector pinoutTable 42. Zone 1 contact assignments, P10Contact Designation DescriptionMating sequence1 Res
CConnector Pinouts and Jumper Settings144Zone 2 J20 connector pinout 31 EARLY_B –48 Volt Early B–48 Volt input, Feed B prechargeFirst32 ENABLE_A Enab
CZone 2 J23 connector pinout145Zone 2 J23 connector pinoutTable 44. Backplane connector J23 signalsRow Interface designation AB CD EF GH1 Fabric Chann
CConnector Pinouts and Jumper Settings146RTM interface pinoutZone 3 J30 connector pinoutZone 3 J31 connector pinoutTable 45. RTM connector J30 signals
CAMC connector pinout147AMC connector pinoutTable 47. AMC connector pinoutPin AMC pin name Source Description1GND Logic Ground2MB_PWR Carrier Payload
CConnector Pinouts and Jumper Settings14840 GND Logic Ground41 MB_ENABLE# Carrier AMC Enable42MB_PWR Payload Power43GND Logic Ground44MB_RX4+ AMC PCIe
CAMC connector pinout14979 GND Logic Ground80MB_FCLKA+ Carrier Fabric Clock A+100 MHz clock from PCI Express clock generator81MB_FCLKA– Carrier Fabric
1Quad-core processor with integrated memory controller15Quad-core processor with integrated memory controllerForcentralprocessingoperations,theAT
CConnector Pinouts and Jumper Settings150119 GND Logic Ground120MB_RX13– AMC Update channel RX from AMC to Slow Path Buffer121MB_RX13+ AMC Update chan
CAMC connector pinout151157 MB_RX19+ AMC SERDES RX from AMC through CPM to RTM158GND Logic Ground159MB_TX20– Carrier SERDES TX from RTM through CPM to
CConnector Pinouts and Jumper Settings152Jumper settingsFigure 20showsthephysicallocationofthestrappingheader,andTable 48describestheeffe
153DFRU INFORMATIONFRUinformationisstoredinnon‐volatilememoryandisusedbytheIPMCtolocateandcommunicatewiththeavailableFRUs.TheCPM
DFRU Information154CPM and FRU device IDsTheCPMIPMCcontainsuniqueidentificationinformation.Table 49andTable 50describethoseidentifiers.Ta
155ELOW-LEVEL HARDWARE MAPThisappendixprovidesdetailsfortheCPMinputandoutput,mainmemorymaps,andSMBusmaps.Additionalinformationispro
ELow-Level Hardware Map156ICH10R I/O Controller HubSATA 3A55h 22 0 0 N.A. YesVECI 3A51h 23 0 0 N.A.LAN 3A7Ch 25 0 0 N.A. NoUSB UHCI #4 3A67h 26 0 0 N.
EPCI bus device map157QPI Physical 1 2C15h 2 5 N.A.Intel Xeon L5518 CPU Integrated Memory ControllerRegisters 2C18h 3 0 N.A.Target Address Decoder 2C1
ELow-Level Hardware Map158InterruptsThissectiondescribesI/Ocontrollerhubinterrupts,APICinterruptmapping,andPICinterruptmapping.I/O contro
EAPIC interrupt mapping159APIC interrupt mappingTable 52liststheAPICinterruptmappingfortheCPM.Table 52. APIC interrupt mappingICH APIC IRQ# So
1Product Overview16Hardware managementThefunctionandoperationoftheCPMhardwaremanagementsubsystemiscontrolledbytheIntelligentPlatformMa
ELow-Level Hardware Map160PIC interrupt mappingTable 53liststhesignalsconnectedtothe8259‐compatibleprogrammableinterruptcontroller.Table 53.
EI/O map161I/O mapThehubinterfacecyclesthatgototargetrangesthataremarkedas“RESERVED”arenotdecodedbytheICH;theyarepassedtotheP
ELow-Level Hardware Map16281h–83h DMA Controller DMA Controller DMA ICH10R84h–86h DMA Controller DMA Controller, or LPC, or PCI DMA ICH10R87h DMA Cont
EI2C and SMBus map163I2C and SMBus mapFigure 21illustratestheSMBusconnectionsandaddresses,whicharelistedinTable 55onpage 164.Figure 21. I
ELow-Level Hardware Map164Table 55. I2C and SMBus device addressesDevice Master / slave Bus # Read address Write addressIPMC EEPROM Slave 2 A1h A0hIPM
EI2C and SMBus map165PCA9555 (AMC PCIe and RTM PCIe0)Slave IOH SMBus 41h 40hPCA9555 (RTM PCIe1) Slave IOH SMBus 43h 42haThe three geographical pins GA
ELow-Level Hardware Map166
167FBIOSCLI2 COMMANDSThisappendixdescribesthecommandoptionsandusageforthebioscli2utility.SeeCommandlineutilityforchangingBIOSsettin
FBIOSCLI2 commands168Advanced commands‐edExportonlineBIOSsettingstoadatabase/inifile.bioscli2‐edbiosdb.ini‐idImportonlineBIOSsettingsfrom
FTroubleshooting169TroubleshootingTable 56listsbioscli2erro rmessages,alongwithadescriptionoftherelatederrorconditionandthecorrective
172INSTALLING MEMORY MODULESSupported DIMM combinationsThereareeightDIMMsockets(dualinlinememorymodules)ontheCPMforinstallingVLPDDR3re
FBIOSCLI2 commands170
171GCONFIGURE iSCSI BOOTThisappendixdescribeshowtoconfigureaniSCSIbootdevice.ItappliestoanATCA‐4500,ATCA‐4550,orATCA‐4555CPMwithan
GConfigure iSCSI Boot172Configure the Intel iSCSI boot firmware to connect to the iSCSI device1. WhentheCPMreboots,pressCTRL‐DtoentertheIntel
GInstall Red Hat Enterprise Linux173Install Red Hat Enterprise Linux1. AftertheRHELDVDboots,enterthefollowingcommand:linuxtextconsole=ttyS0
GConfigure iSCSI Boot174Install support packages1. ExtractthecontentsofthePromentumsoftwareinstallationtarballcontainingthesupportpackages
2Installing Memory Modules18Mismatched DIMM combinations and SEL error eventsAmemoryinitializationerroroccursifmemorychannelsarenotconsisten
2Installing the memory cards19Installing the memory cards1. OpentheDIMMsocketejectorlatchesbypushingthemoutward.SeeFigure 4.Figure 4. DIMM
2Release historyVersion Date Description-0000 August 2009 First edition.-0001 August 2010 Second edition. New features and modifications.-0002 October
2Installing Memory Modules20Testing installed memoryAftertheDIMMsareinstalledandtheCPMisinstalledintheshelf,verifythattheexpectedmemo
2Running a memory test21Thefollowingisanexampleofmemtestoutput:Shell>memtestLOOP:Startingpass1START:TestingMemoryRegion0x8000‐
2Installing Memory Modules22
233LEDS AND EXTERNAL INTERFACESThischapterdescribestheexternalindicators,switches,andportsfortheCPM.Front panel LEDs, buttons, and portsFi
3LEDs and External Interfaces24TheCPMhasametalfrontpanelthatservesasanEMI/RFIbarrierandprovidesaccesstofrontpanelportsandPICMG3.
3Front panel LEDs, buttons, and ports25Figure 6. ATCA-4500, ATCA-4550, ATCA-4555 CPM front panel features ThumbscrewEjector latchReset buttonUSB port
3LEDs and External Interfaces26Front panel LEDsTable 2describesthefrontpanelstatusandactivityLEDs.TheIPMCusesGPIOpinstocontrolthehot
3AMC bay27Serial RS-232 connectorAnexternalcomputercanbeattachedtotheCPMbyconnectingashieldedRJ‐45cabletothecomputerandthefrontpa
3LEDs and External Interfaces28Backplane interfaces BackplaneconnectorJ23istheATCAdatatransportconnector,whichprovidesZone2 connectionsf
3Rear transition module (RTM) interface29Rear transition module (RTM) interfaceTheCPMincludesthestandardZone3backplaneinterfacetoprovidecon
3Preface...
3LEDs and External Interfaces30
314COMPONENTS AND SUBSYSTEMSThischapterdiscussestheCPM’smajorcomponentsandsubsystems.Processor and memory controllerTheCPMsupportsvariousv
4Components and Subsystems32TheCPUincludesasingledigitalthermalsensor(DTS)thatcontinuouslymeasuresthetemperatureateachprocessingcore
4Quick path interconnect332x refresh modeTheCPUdoublestherefreshratetothememorychannelstobetterpreservethedatawhentheDRAMisoperatin
4Components and Subsystems34DDR3 SDRAMTheCPMhas8VLPDIMMsocketsforregisteredDDR3SDRAMmodules.TheseDIMMsocketsaregroupedintothreeinde
4Redundant user flash35Redundant user flashTheCPMoptionallyincludestwobanksofuserflashmemor ywithupto16GBstoragecapacityforeachbank
4Components and Subsystems36I/O hub to PCI Express devicesTheCPMincludesanIntel5520chipsetI/Ohub(IOH)thatprovidesthebridgebetweenthePC
4USB controller37USB controllerTheICHcontainstwouniversalhostcontrollerinterface(UHCI)controllersandtwoenhancedcontrollerhostinterface
4Components and Subsystems38Real-time clockTheICHincludesanintegratedreal‐timeclock(RTC)thatkeepstrackofthetimeofdayanddate.TheRTC
4Super I/O chip39TheICHSMBusconsistsofatransmitdatapathandhostcontroller.Thetransmitdatapathprovidesthedataflowlogicneededtoimp
4Table of ContentsSuper I/O chip...
4Components and Subsystems40Figure 7. SAS/SATA multiplexer connectionsEthernet controllers and interfacesGigabit Ethernet interfacesTheCPMusestwod
410-gigabit Ethernet Fabric interface41Base InterfaceTheBasecontrollerisconfiguredforMDI(copper),providing1000Base‐T,100‐Base‐TX,and10Base
4Components and Subsystems42DependingontheinterfaceE‐Keying,Fabricchannel1isconfiguredasoneoftheseoptions:•A10GBase‐BX4(orKX4)conne
410-gigabit Ethernet Fabric interface43Figure 8. Ethernet Fabric interfaceMultiplexerMultiplexerMultiplexerMultiplexer10GbE Fabric ConfigurationGbE Fa
4Components and Subsystems44AMC bayTheCPMsupportsoneAdvancedMezzanineCard(AMC)baythatiscompliantwiththeAMC.0,AMC.1(PCIExpress),AMC.2
4AMC bay45TheCPM’sIPMCprovidesintelligentplatformmanagement(IPM)connectivitybetweenthebackplaneIPMBandtheAMC’slocalIPMB(IPMB‐L).Dep
4Components and Subsystems46Update channel connections to the AMC bayTheupdatechannelonthebackplanehasbothfast(channel0)andslow(channel4
4Update channel connections to the AMC bay47TheconnectionstoPort13ofeachAMCbayareusedforsingle‐endedgeneral‐purposeI/O(GPIO)signals.T
4Components and Subsystems48Intelligent Platform Management ControllerTheIntelligentPlatformManagementController(IPMC)monitorsthehealthofthe
495HARDWARE MANAGEMENTThehardwaremanagementsubsystemincludestheIntelligentPlatformManagementController(IPMC),themanagedsensors,andthec
5Table of ContentsAppendix A: Specifications ...
5Hardware Management50IPMC descriptionThehardwaremanagementsystemoftheCPMiscontrolledbyanIPMC,whichcomprisesamicrocontroller,anIPMCF
5IPMC FPGA51IPMC FPGATheIPMCFPGAconsistsofaLatticeLF XP6CF256I‐3FPGAthatisusedtoprovideGeneralPurposeI/O(GPIO)expansionfortheIPMC
5Hardware Management52Redundant firmware imagesTheH8microcontrollerfirmwareimageiscomposedofasinglebootimageanddualredundantapplication
5Summary of IPMC controls53Summary of IPMC controlsTheIPMCmanagesresets,powerstates,andIPMBisolationfortheCPManditsAMCandRTM.Theoutp
5Hardware Management54RTM controlsTheIPMCmanagestheRTMcontrolslistedinTable 12.Overview of sensor managementTheIPMCsensorsmonitorvoltages
5CPM resets55CPM resetsTheCPMsupportsonlycoldandpowergoodresets.Anywarmresetsourcesareconvertedtoacoldresetbythe legacyFPGA.Cold
5Hardware Management56Reset source monitorTheRST_SRCinputsoftheIPMCareusedtomonitorthevariousresetsourcesontheboard.Whenoneofthei
5Watchdog timers57Watchdog timersTheCPMprovidesfourwatchdogtimers(seeTable 15)tohelppreventtheboardfromenteringanunrecoverablestate.
5Hardware Management58IPMC watchdogTheIPMCFPGAincludesahardwarewatchdogtimer,referredtoasWatchdog2.ThiswatchdogpreventsIPMChardwareo
5Hot swap of the CPM and managed FRUs59Hot swap of the CPM and managed FRUsTheCPManditsmanagedFRUsarehot‐swapcapableandmeetthehot‐swapreq
6Table of Contents
5Hardware Management60Updatechannel0isconsideredthe“fastpath”updateportandconnectstheAMCbayport12totheZone2connector.ItisE‐Key
5E-Key control of interfaces61AsanAMCcarrier,theCPMIPMCworkswiththeAMC’smodulemanagementcontroller(MMC)tomatchtheportsontheAMC’s
5Hardware Management62IPMI-over-LANAremotemanagementapplicationcanestablishanIPMI‐over‐LANsessionwiththeIPMC.TheIPMCisremotelyaccessib
5Configuring IPMI-over-LAN access63IPMI-over-LAN basic configuration stepsFromtheLinuxprompt:1. SettheIPaddressforaBaseinterfacechannelor
5Hardware Management64IPMI-over-LAN additional configuration stepsIfIPMI‐over‐LANdoesnotworkafterperformingthebasicsteps:1. Settheuserpri
5Serial-over-LAN65Serial-over-LANSerial‐over‐LAN(SOL)isthespecificationofpacketformatsandprotocolsfortransmittingserialdataoveraLANus
5Hardware Management66Figure 14. Serial-over-LAN – no cables attachedIfaserialcableisattachedtotheRTMonly,theSuperI/OCOM2isselectedto
5Serial-over-LAN67Figure 16. Serial-over-LAN – cable installed for front onlyIfserialcablesareat tachedforboththefrontmoduleandtheRTM,the
5Hardware Management68Table 20summarizestheSOLserialportconnections.CabledetectionisprovidedbyanIntersilISL4243ERS‐232transceiver.When
5Establishing a SOL session69Establishing a SOL sessionPrerequisite:ThisprocedureassumesthattherequiredsetupforIPMI‐over‐LANhasbeendoneon
7PREFACEAbout this manualThismanualdescribesthePromentum®ATCA‐4500,ATCA‐4550,andATCA‐4555computeprocessingmodules(CPM),whichoffercompli
5Hardware Management70
716SYSTEM BIOSThesystemBIOSisbasedonAMIBIOS®fromAmericanMegaTrendsandisadaptedbyRadiSys.TheBIOSsetuputilityappearanceresemblesal
6System BIOS72Note:AdescriptionofeachmenuoptionappearsintheupperrightcorneroftheBIOSsetupscreen.ContactRadiSyssupportifadditiona
6Command line utility for changing BIOS settings73Command line utility for changing BIOS settingsUsethebioscli2utilitytoviewandchangeEFIBIOS
6System BIOS74Creating a custom BIOS imageThefollowingproceduresexplainhowtoextractandrestoreaBIOSimagethatincludesyourcustomsettings.
6Configuring the front or rear Ethernet ports75Configuring the front or rear Ethernet portsFrontorrearEthernetportsareconfiguredintheBIOSset
6System BIOS76BIOS event and error reportingTheBIOSsendstheseeventstotheIPMCduringBIOSstart‐up,earlyPOSTtasks,andexecution:•Systemeven
6Correctable and uncorrectable memory error logging775. Asoftware‐maintainedcounterisincrementedwheneveracorrectablememoryerrorSMIoccurs.I
6System BIOS78Accessing the SELMessagesintheSELareview edusingthersys‐ipmitoolutility.Forexample,toviewthesystemSELfromasystemthat
6SEL event codes79Memory 0Ch FFh Memory initialization errorEvent Data 1:A4h Memory device disabledA7h Configuration errorEvent Data 2:[7:6] Reserved[
TitlePreface8Notational conventionsThismanualusesthefollowingconventionsAllnumbersaredecimalunlessotherwisestated.Electrostatic discharge
6System BIOS80System firmware progress0Fh 00h System firmware error (POST error)The Event Data 2 field can be used to provide an event extension code,
6SEL event codes81System firmware progress (continued)0Fh (continued) 02h System firmware progressThe Event Data 2 field can be used to provide an eve
6System BIOS82System firmware progress (continued)0Fh (continued) 00h Supercap discharge detectedEvent Data 1: A0h System firmware errorEvent Data 2:
6SEL event codes83Critical interrupt13h 00h Front panel NMI/diagnostic interrupt01h Bus timeout02h I/O channel check NMI03h Software NMI04h PCI PERR (
6System BIOS84Critical interrupt13h0Ah Event Data 1: A4h bus fatal errorEvent Data 2: 04h error type – IOH QPI errorEvent Data 3:0Bh C0 - Intel QPI li
857MAINTENANCE AND TROUBLESHOOTINGField replaceable units (FRUs)ThefollowingCPM‐relateditemscanbeinstalledorreplaced:•TheCPMitself.Forinst
7Maintenance and Troubleshooting86WARNING! • Never force open a locking ejector latch. The locking mechanism must be disengaged to release the latch o
7Overview of firmware updates87Important:IftheCPMisinstalledinlogicalslot1(slotaddress0x82)fora2‐slotshelf,theCPMbydefaultassumes
7Maintenance and Troubleshooting88•ByspecifyingtheCPM’sBaseinterfaceIPaddressintheupgradecommands.Thismethodisavailablewhenaccessto
7General troubleshooting tips89General troubleshooting tipsWhentheCPMdoesnotperformasexpected,lookforsymptomsthatmightclarifythecause.
TitleWhere to get more product information9Where to get more product informationVisittheRadiSysWebsiteatwww.radisys.comforproductinformation
7Maintenance and Troubleshooting90The CPM or another module overheats.• Verify that a generic front panel is not installed in the shelf. Instead, empt
91ASPECIFICATIONSEnvironmental specificationsRadiSysdoesnotprovideenvironmentalcertificationtestingbecauseanymeaningfulemissionsagencycert
ASpecifications92Safety specificationsThesafetyspecificationsaremeasured underlaborator yambienttemperatureandhumidity(approximately25C
AElectromagnetic compatibility (EMC)93Electromagnetic compatibility (EMC)TheESD,EMC,andImmunityspecificationsaremeasuredwithambienttemperatu
ASpecifications94Power consumptionMean time between failures (MTBF)•CalculationType:MTBF/FITrate• Standard:Telcordi aStandardSR‐332Issue2• Me
AGeneral assumptions95General assumptions• Componentfailureratesareconstant.•Board‐to‐systeminterconnectsareincludedwithinestimates.•Non‐elec
ASpecifications96
97BIPMI COMMANDS AND MANAGED SENSORSSupported IPMI commandsTable 33 lists the supported IPMI commands.Table 33. Supported IPMI commandsMessage command
BIPMI Commands and Managed Sensors98Set Event Receiver S/E (0x04) 0x00Get Event Receiver S/E (0x04) 0x01Platform Event (a.k.a “Event Message”) S/E (0x
BSupported IPMI commands991Completion code flags for bits 2, 3, 4 and 6 of byte 3 are not supported for the CPM, so those bits should be 0. See the In
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